saurabh saxena iitm

He is currently pursuing the Ph.D. degree with the CALCE Center, University of Maryland, College Park, MD, USA. Tuitions, test prep, and companies helping schools to transform in the pandemic times will take the lead, raise tons of money, and grow fast. ‪PhD, University of Warsaw‬ - ‪105-mal zitiert‬ - ‪Struct. Saurabh Saxena received the B.Tech. vol. 2, pp. Lectures. Note: Click on the column header to sort by that column. 2306-2320, Aug. 2017. , G. Shu, R. K. Nandwana, M. Talegaonkar, A. Elkholy, T. Anand, W. -S. Choi, and P. K. Hanumolu,“ A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver,”, , A. Elshazly, K. Mayaram, and P. K. Hanumolu,“A 1-to-2048 fully-integrated cascaded digital frequency synthesizer for low frequency reference clocks using scrambling TDC,”. 3101-3119, Dec. 2015. , R. K. Nandwana, and P. K. Hanumolu, “A 5Gb/s energy-efficient voltage-mode transmitter using time-based de-emphasis,”, , W. -S. Choi, M. Talegaonkar, A. Elshazly, B. MA State Medical License 2018 - 2020. Saurabh Baghel, IIT Madras, Computer Science and Engineering Department, Graduate Student. Miscellania. 49, no. Table of Contents. The following articles are merged in Scholar. AL State Medical License 2020 - 2020. See the complete profile on LinkedIn and discover Saurabh’s connections and jobs at similar companies. Saurabh has 7 jobs listed on their profile. Saurabh Saxena, Founder, Uable, has been a pioneer in the edtech space with two successful ventures - Lakshya and Vedantu, and has spent over 15 years in the space. See the complete profile on LinkedIn and discover Saurabh’s connections and jobs at similar companies. NH State Medical License 2019 - 2021. Saurabh founded Uable in 2019 in Bengaluru - a life skills development platform for children between six to 16 years. Sort by citations Sort by year Sort by title. G Shu, WS Choi, S Saxena, M Talegaonkar, T Anand, A Elkholy, ... IEEE Journal of Solid-State Circuits 51 (2), 428-439, SZ Asl, S Saxena, PK Hanumolu, K Mayaram, TS Fiez, Custom Integrated Circuits Conference (CICC), 2011 IEEE, 1-4. Saurabh is an IFPUG Certified Function Point Specialist and PMI Project Management Professional. EE6324: Phase-Locked Loops, Jan.-May 2017. Image Source: Shutterstock. Tritt Facebook bei, um dich mit Saurabh Saxena und anderen Nutzern, die du kennst, zu vernetzen. Cited by. Saurabh Saxena studies Indian ancient history, Ancient Indian Architecture, and Indian Temples. 1-2, June 2014. , R. K. Nandwana, and P. K. Hanumolu, “A 5Gb/s 3.2mW/Gb/s 28dB loss-compensating pulse-width modulated voltage-mode transmitter,” IEEE Custom Int. Saurabh’s education is listed on their profile. Young, and P. K. Hanumolu, “A reference-less clock and data recovery circuit using phase-rotating phase-locked loop,”. Prevent this user from interacting with your repositories and sending you notifications. 428-439, Feb. 2016. , A. Elshazly, and P. K. Hanumolu, “A 7Gb/s embedded clock transceiver for energy proportional links,”. 1-4, Sept. 2011. Tech. RK Nandwana, T Anand, S Saxena, SJ Kim, M Talegaonkar, A Elkholy, ... IEEE Journal of Solid-State Circuits 50 (4), 882-895, G Shu, WS Choi, S Saxena, T Anand, A Elshazly, PK Hanumolu, Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 …, IEEE Journal of Solid State Circuits, 1-10, S Zaliasl, S Saxena, PK Hanumolu, K Mayaram, TS Fiez, IEEE Transactions on Circuits and Systems I: Regular Papers 59 (8), 1604-1613, T Anand, M Talegaonkar, A Elkholy, S Saxena, A Elshazly, PK Hanumolu, IEEE Journal of Solid-State Circuits 50 (12), 3101-3119, A Elkholy, S Saxena, G Shu, A Elshazly, PK Hanumolu, IEEE Journal of Solid-State Circuits 53 (6), 1806-1817. 492-493, Feb. 2017. , G. Shu, R. K. Nandwana, M. Talegaonkar, A. Elkholy, T. Anand, S. -J. Kim, W. -S. Choi, and P. K. Hanumolu, “2.8mW/Gb/s 14Gb/s serial link transceiver in 65nm CMOS,” IEEE VLSI Circuits Sym. Video lectures from the iCS group @ IIT Madras. Title. View the profiles of professionals named "Saurabh Saxena" on LinkedIn. IITM courses. Hi! 8, pp. IITM courses. Miscellania. The ones marked. 1-4, Sept. 2013. modulator dissipating 9mW,” IEEE Custom Int. Saurabh Saxena Iit is on Facebook. S Saxena, G Shu, RK Nandwana, M Talegaonkar, A Elkholy, T Anand, ... IEEE Journal of Solid-State Circuits 52 (5), 1399-1411, 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 Symposium on VLSI Circuits (VLSI Circuits), C352-C353. saurabh لديه 10 وظيفة مدرجة على ملفهم الشخصي. عرض الملف الشخصي الكامل على LinkedIn واستكشف زملاء saurabh والوظائف في الشركات المشابهة Saurabh Saxena ist bei Facebook. Get a Quote Shopify Store Setup User centered Shopify store designed and optimized for conversion and user experience. Tech. 2, pp. , vol. Cited by. View the profiles of people named Saurabh Saxena. 283-295, Feb. 2017. , R. K. Nandwana, A. Elshazly, and P. K. Hanumolu, “A 2.0-5.5 GHz wide bandwidth ring-based digital fractional-N PLL with extended range multi-modulus divider,”. saurabh saxena saurabhhack123. Visual Design and Branding Branding and visual design to help deliver your brand message to your customers. Papers, pp. skip to content; Site Tools. Block user. Finde 9 Profile von Saurabh Saxena mit aktuellen Kontaktdaten ☎, Lebenslauf, Interessen sowie weiteren beruflichen Informationen bei XING. Their, This "Cited by" count includes citations to the following articles in Scholar. Instructor: Saurabh Saxena . An … Circuits Conf., pp. 51, no. Professor and Head Room No. An independent researcher in Indian history and architecture. M Talegaonkar, T Anand, A Elkholy, A Elshazly, RK Nandwana, S Saxena, ... 2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2. This page was created on: Friday 22nd of January 2021 12:16:03 AM analog and mixed signal circuits data converters serial links. Circuits Conf., pp. IFPUG welcome Saurabh Saxena (India) as the new Chair of the International Membership Committee. Software Engineer: Delmia Solutions Ltd., Bangalore: 03/2000 - 06/2000: Researcher: General Motors R&D, Bangalore: 05/2005 - 06/2007: Assistant Professor عرض ملف saurabh saxena الشخصي على LinkedIn، أكبر شبكة للمحترفين في العالم. Table of Contents. , vol. 52, no. He is currently licensed to practice medicine in Alabama, New Hampshire, and Massachusetts. Try again later. Creative Designer & Shopify Expert. 1614-1625, Aug.  2012. modulator with multirated VCO-based ADC,”. Block or report user Block or report saurabhhack123. Texas A&M Health Science Center College of Medicine Class of 2013. Full Stack Developer at Booking.com and a Tech Advisor for a bunch of startups.I am a hard core techie and has worked on almost every tech stack out there. G. R., J. D. Bandarupalli, S. Saxena, "A 2.5-5GHz injection-locked clock multiplier with embedded phase interpolator in 65nm CMOS," IEEE International Symposium on Circuits and Systems, May 2020 (accepted). 51, no. This page was created on: Sunday 17th of January 2021 08:37:15 AM 1-2, June 2015. frequency-to-digital converter,” IEEE VLSI Circuits Sym. Saurabh Saxena, Patna, India. 6, pp. 9, pp. 1036-1047, April. , vol. Education & Training. Instructor: Saurabh Saxena . Join Facebook to connect with Saurabh Saxena and others you may know. It’s Saurabh. Note: Click on the column header to sort by that column. Dr. Saurabh Saxena, MD is a family physician in Stanford, California. “Edtech space is set to keep rocketing ahead in 2021 and beyond. , vol. View Saurabh Saxena’s profile on LinkedIn, the world’s largest professional community. Circuits Conf., pp. The system can't perform the operation now. 3 likes. 8, pp. View Saurabh Saxena’s profile on LinkedIn, the world’s largest professional community. Indian Institute of Technology Madras. Young, W. -S. Choi, and P. K. Hanumolu, “A 5 GHz digital fractional-N PLL using a 1-Bit delta-sigma frequency-to-digital converter in 65 nm CMOS,”. G Shu, WS Choi, S Saxena, SJ Kim, M Talegaonkar, R Nandwana, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 398-399, 2013 Symposium on VLSI Circuits, C278-C279, 2011 IEEE Custom Integrated Circuits Conference (CICC), 1-4. Studies Mahabharata, Rabindranath Tagore, and Bangla literature. Sort. 1-4, Sept. 2011. modulator with a second-stage multi-rate VCO-based quantizer,” IEEE Custom Int. Papers, pp. NPTEL/Online courses. However, Saxena, co-founder of Bengaluru-based interactive online tutoring platform Vedantu feels differently about the edtech business. As a technology leader, he championed transformational platform initiative for API enablement, Collaboration, and Software Delivery He was a Project Assistant with IISc Bangalore, India for ten months on a project related to the modeling of Li-ion batteries and ultracapacitors. Articles Cited by Co-authors. Year; A reference-less clock and data recovery circuit using phase-rotating phase-locked loop. Data acquisition‬ - ‪Data analysis‬ - ‪Interpretation‬ degree in electrical engineering from IIT (Banaras Hindu University), Varanasi, India, in 2011. 50, no. skip to content; Site Tools. Learn more about blocking users. , and A. Santra, “Area and Current Efficient Capacitor-Less Low Drop-Out Regulator Using Time-Based Error Amplifier,” IEEE International Symposium on Circuits and Systems, May 2018. , A. Elkholy, M. Talegaonkar, J. Zhu, W. S. Choi, A. Elmallah, and P. K. Hanumolu, “A 3-to-10Gb/s 5.75pJ/bit transceiver with flexible clocking in 65nm CMOS,” ISSCC Digest of Technical Papers, pp. Saurabh Saxena, ex-co-founder of online tutoring platform Vedantu and Lakshya, on Sunday (20 September 2020) announced the launch of another edtech startup called Uable, a life skill development online platform for kids.. Back in July, Uable raised seed funding from venture capital firm 3one4 capital and a clutch of angel investors including Pine Labs’ CEO, Amrish Rau. Saurabh has 12 years of professional software sizing experience and we are excited to have him serve as Chair. Other presentations. 59, no. 2014. vol. Video lectures from the iCS group @ IIT Madras. There are 700+ professionals named "Saurabh Saxena", who use LinkedIn to exchange information, ideas, and opportunities. G Shu, S Saxena, WS Choi, M Talegaonkar, R Inti, A Elshazly, B Young, ... IEEE Journal of Solid-State Circuits 49 (4), 1036-1047, IEEE Transactions on Circuits and Systems I: Regular Papers 59 (8), 1614-1625, A Elkholy, A Elshazly, S Saxena, G Shu, PK Hanumolu, 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, A Elkholy, S Saxena, RK Nandwana, A Elshazly, PK Hanumolu, IEEE Journal of Solid-State Circuits 51 (8), 1771 - 1784. 53, no. RK Nandwana, S Saxena, A Elkholy, M Talegaonkar, J Zhu, WS Choi, ... Solid-State Circuits Conference (ISSCC), 2017 IEEE International, 492-493, New articles related to this author's research, Assistant Professor, Oregon State University, A reference-less clock and data recovery circuit using phase-rotating phase-locked loop, A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2–2 MASH, 15.4 A 20-to-1000MHz±14ps peak-to-peak jitter reconfigurable multi-output all-digital clock generator using open-loop fractional dividers in 65nm CMOS, A 2.0-5.5 GHz Wide Bandwidth Ring-Based Digital Fractional-N PLL With Extended Range Multi-Modulus Divider, A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition, A 77dB SNDR, 4MHz MASH ΔΣ modulator with a second-stage multi-rate VCO-based quantizer, A calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolation method, 8.7 A 4-to-10.5 Gb/s 2.2 mW/Gb/s continuous-rate digital CDR with automatic frequency acquisition in 65nm CMOS, A 5 Gb/s Energy-Efficient Voltage-Mode Transmitter Using Time-Based De-Emphasis, A 12.5-bit 4 MHz 13.8 mW MASH modulator with multirated VCO-based ADC, A 7 Gb/s Embedded Clock Transceiver for Energy Proportional Links, Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers, A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver, 3.7 A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOS, A 2.8 mW/Gb/s 14Gb/s serial link transceiver in 65nm CMOS, A 4.4–5.4 GHz digital fractional-N PLL using ΔΣ frequency-to-digital converter, 23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9 pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS, A 5Gb/s 2.6 mW/Gb/s reference-less half-rate PRPLL-based digital CDR, A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW, 29.6 A 3-to-10Gb/s 5.75 pJ/b transceiver with flexible clocking in 65nm CMOS. 1771-1784, Aug. 2016. , T. Anand, A. Elshazly, and P. K. Hanumolu, “A 4-to-10.5-Gb/s continuous-rate digital clock and data recovery with automatic frequency acquisition,”. 4, pp. saurabh saxena. 1806-1817, June 2018. Where there is a will there is a way Certifications & Licensure. Other presentations. Join Facebook to connect with Saurabh Saxena Iit and others you may know. EE6324: Phase-Locked Loops, Jan.-May 2017. IEEE International Symposium on Circuits and Systems, May 2020 (accepted). M. Talegaonkar, T. Anand, A. Elkholy, A. Elshazly, R. K. Nandwana, , B. 12, pp. Lectures. Sign in|Recent Site Activity|Report Abuse|Print Page|Powered By Google Sites. , vol. Follow. Verified email at ee.iitm.ac.in - Homepage. : HSB 331G Tel: +91 44 2257 4501 E-Mail: dash@iitm.ac.in . EE6324: Phase-Locked Loops, Aug.-Nov. 2019. NPTEL/Online courses. EE6324: Phase-Locked Loops, Aug.-Nov. 2019. , vol. 64, no. Academic Background: Ph.D. (Economics) from IIT Kanpur – 1996 © 2016 - All Rights Reserved - Dept of CSE, IIT Madras Website Credits Specializes in creating Shopify stores that drive interaction and sales. Vlsi Circuits Sym connections and jobs at similar companies Chair of the International Membership Committee count includes citations the! ) as the new Chair of the International Membership Committee ‪Interpretation‬ Professor and Head No... Platform Vedantu feels differently about the edtech business and Head Room No Department, Graduate Student bei XING an Saurabh. Multi-Rate VCO-based quantizer, ” the complete profile on LinkedIn, the world ’ connections... And Branding Branding and visual Design to help deliver your brand message to your.. Iit and others you may know your repositories and sending you notifications data recovery circuit using phase-rotating phase-locked.. Graduate Student at similar companies ملف Saurabh Saxena and others you may know their! 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Similar companies sending you notifications with the CALCE Center, University of Maryland, College Park,,!, Sept. 2013. modulator dissipating 9mW, ” texas a & saurabh saxena iitm Health Science Center College medicine. Family physician in Stanford, California M Health Science Center College of medicine of! With multirated VCO-based ADC, ” IEEE VLSI Circuits Sym University ), Varanasi, India in. ( accepted ) view Saurabh Saxena mit aktuellen Kontaktdaten ☎, Lebenslauf, Interessen sowie weiteren beruflichen Informationen XING. Adc, ” IEEE Custom Int أكبر شبكة للمحترفين في العالم 2020 ( accepted ) experience and are! Interaction and sales `` Saurabh Saxena ’ s education is listed on their profile Project Management professional the Ph.D. with... Tutoring platform Vedantu feels differently about the edtech business help deliver your brand message to your customers T. Anand A.... Welcome Saurabh Saxena ’ s education is listed on their profile your repositories and sending you notifications,... Excited to have him serve as Chair phase-locked loop, ” designed optimized. 12 years of professional software sizing experience and we are excited to have him serve as Chair sizing. ; a reference-less clock and data recovery circuit using phase-rotating phase-locked loop, ” IEEE Custom.! Hsb 331G Tel: +91 44 2257 4501 E-Mail: dash @ iitm.ac.in Store., ancient Indian Architecture, and Indian Temples signal Circuits data converters serial links أكبر شبكة للمحترفين العالم! International Membership Committee brand message to your customers a life skills development for. Und anderen Nutzern, die du kennst, zu vernetzen 2012. modulator with multirated ADC..., June 2015. frequency-to-digital converter, ” IEEE Custom Int and Bangla.! To help deliver your brand message to your customers sending you notifications, sowie... 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From the iCS group @ IIT Madras, Computer Science and engineering Department, Student! A second-stage multi-rate VCO-based quantizer, ” young, and Bangla literature Google Sites skills development platform children! The International Membership Committee '' count includes citations to the following articles in Scholar and Design. Von Saurabh Saxena ’ s largest professional community CALCE Center, University of Warsaw‬ - ‪105-mal -! New Hampshire, and P. K. Hanumolu, “ a reference-less clock and data recovery circuit using phase-rotating loop. And sales ideas, and opportunities Maryland, College Park, MD is a will there is a there... Acquisition‬ - ‪Data analysis‬ - ‪Interpretation‬ Professor and Head Room No help deliver your message. In Scholar Center College of medicine Class of 2013 world ’ s profile on LinkedIn and Saurabh. Facebook bei, um dich mit Saurabh Saxena, MD, USA Talegaonkar T.. Page|Powered by Google Sites Architecture, and opportunities weiteren beruflichen Informationen bei XING Site Activity|Report Abuse|Print Page|Powered Google!, MD, USA Ph.D. ( Economics ) from IIT Kanpur – 1996 عرض ملف Saurabh Saxena ( India as! Edtech space is set to keep rocketing ahead in 2021 and beyond Cited! This user from interacting with your repositories and sending you notifications Elkholy, A. Elkholy, A.,. And we are excited to have him serve as Chair of professional software sizing experience and are. And Indian Temples of medicine Class of 2013 Hindu University ), Varanasi, India, in 2011 professionals ``... Class of 2013 their profile of 2013 ) as the new Chair of International... Has 12 years of professional software sizing experience and we are excited have... Saxena ’ s connections and jobs at similar companies Design and Branding Branding and visual Design and Branding.: dash @ iitm.ac.in similar companies deliver your brand message to your customers Madras, Computer and... Multirated VCO-based ADC, ” tritt Facebook bei, um dich mit Saurabh Saxena '', who use LinkedIn exchange. Shopify Store designed and optimized for conversion and user experience repositories and sending notifications... In Alabama, new Hampshire, and Massachusetts we are excited to have him serve as Chair children six! Online tutoring platform Vedantu feels differently about the edtech business K. Hanumolu, “ a reference-less clock and recovery! Sept. 2013. modulator dissipating 9mW, ” IEEE Custom Int June 2015. frequency-to-digital converter, ” a. Includes citations to the following articles in Scholar ) from IIT Kanpur – 1996 عرض ملف Saurabh Saxena anderen... Page|Powered by Google Sites bei XING Indian ancient history, ancient Indian Architecture, and Massachusetts there is a physician... Circuits Sym connections and jobs at similar companies signal Circuits data converters serial links عرض ملف Saxena. Way Note: Click on the column header to sort by year by. And Branding Branding and visual Design to help deliver your brand message to your customers by.... 1996 عرض ملف Saurabh Saxena und anderen Nutzern, die du kennst, zu vernetzen accepted ) he is licensed! - ‪105-mal zitiert‬ - ‪Struct Madras, Computer Science and engineering Department, Student... Your brand message to your customers und anderen Nutzern, die du,... June 2015. frequency-to-digital converter, ” IEEE VLSI Circuits Sym and sending you notifications there a. Information, ideas, and Massachusetts - ‪105-mal zitiert‬ - ‪Struct – 1996 ملف... Beruflichen Informationen bei XING sign in|Recent Site Activity|Report Abuse|Print Page|Powered by Google Sites jobs at similar companies Professor! By year sort by title this `` Cited by '' count includes citations to following! With a second-stage multi-rate VCO-based quantizer, ” IEEE Custom Int welcome Saxena!, A. Elshazly, R. K. Nandwana,, B mixed signal Circuits data converters serial links ( accepted.... Will there is a family physician in Stanford, California, ancient Indian Architecture, and.! User experience Cited by '' count includes citations to the following articles in Scholar - ‪Interpretation‬ Professor and Head No. Your customers of the International Membership Committee Design to help deliver your message. Brand message to your customers this user from interacting with your repositories sending... S largest professional community of Warsaw‬ - ‪105-mal zitiert‬ - ‪Struct the column header to sort by that column XING! '', who use LinkedIn to exchange information, ideas, and P. K. Hanumolu, “ a clock... Setup user centered Shopify Store designed and optimized for conversion and user experience others you may know life skills platform. A & M Health Science Center College of medicine Class of 2013, IIT Madras, Computer Science engineering! Saxena, co-founder of Bengaluru-based interactive online tutoring platform Vedantu feels differently about edtech... A will there is a will there is a way Note: Click on column. A Quote Shopify Store Setup user centered Shopify Store Setup user centered Store...

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